We have the following position open with one of our clients in multiple location across California. Please check the JD and revert with your updated CV and availability ASAP.

 You can reach me @ 469-310-4962 or tejam@techeraglobal.com

 Job Title: Verification Lead/DV engineers

Locations: Folsom, CA/Santa Clara CA

Duration: 6+ Months/Full Time Employment

 

Job Description:

  • Senior resource to verify ROHC.
  • Both with C, UVM DV skill set with Layer 2 MAC verification experience with WiFi or modem background.
  • 7-10 years’ experience will be preferred but if anyone has worked with ROHC that may be helpful.
  • The candidate will be part of silicon design team chartered with delivering IP and Subsystem designs to multiple server SOCs across Intel.
  • Candidate responsibilities include the following:-
    • Define and enhance methodologies for pre-silicon validation of high complexity IP/SoC designs improving the overall efficiency and velocity of the pre-silicon validation team.
    • Interact closely with the architecture and design teams, influencing product definition, implementation and validation.
    • Create, define and develop system validation environment and test suites.
    • Responsible for the development of methodologies, execution of validation test plans, test sequences and directed tests.

Primary Skills:

  • UVM, C, MAC, Wifi/modem background, Python scripting
  • NOC Bus Fabrics, OCP, AXI, PCIE bus protocols
  • Low power DV with UPF.

Secondary Skills:

Debugging, Perl, Scripting, Excellent communication

Close Menu